Analysis of causes of DC-DC EMC problems
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Analysis of causes of DC-DC EMC problems

Posted Date: 2024-01-25

01

DC-DC working principle and current loop analysis

First, start with the topology of dcdc. Generally, the topology types of DCDC include BUCK, BOOST, BUCK/BOOST, BOOST/BUCK, etc. They are switching DCDCs, which use the energy storage characteristics of capacitors and inductors to perform switching actions through switching tubes. Electric energy is stored in the capacitor and inductor, and when the switch is turned off, the electric energy is released to the load.

If the types of DCDC are further subdivided, they can be divided into self-excited and separately excited based on the excitation method; pulse width modulation and frequency modulation based on the modulation method; isolated (flyback, LLC) and non-isolated based on the isolation method. type; divided into hard switching and soft switching based on the ability to withstand electrical stress (the biggest difference between soft switching and hard switching is voltage stress and current stress); divided into synchronous switching and asynchronous switching based on the switching synchronization method; divided into synchronous switching and asynchronous switching based on the energy storage inductor connection method. Series and parallel types.

1: BUCK topology

The working principle of BUCK is to open the loop:

The red part in the above figure is the turn-on loop. When the MOS tube is turned on, the input source current flows through the MOS tube to store energy in the inductor. The current flowing through the inductor begins to rise, and at the same time, part of the energy is transferred to the output end. At this time, the diode is subjected to the reaction to voltage without conducting.

BUCK working principle freewheeling loop:

The blue part in the picture above is the freewheeling loop. When the MOS tube is turned off, the input source no longer provides energy, and the inductor generates a reverse induced voltage, causing the diode to conduct. The energy stored in the inductor is transferred to the output through the freewheeling loop formed by the diode. terminal, the current flowing through the inductor begins to decrease. The most common EMC problems encountered in DCDC are the turn-on loop and the freewheeling loop. Sometimes when encountering a DCDC EMC problem, just connect a magnetic bead in series with the diode. Sometimes ringing will occur, so this ringing How to solve the problem? These two situations are related to the topological loop. Next, the cause of the EMC problem will be explained through current analysis.

Current analysis of BUCK working principle:

As can be seen from the above figure, the input current of BUCK is discontinuous and the output current is continuous. After the MOS tube is turned off, there is no current input on the left side of the inductor. At this time, all current flows to the output terminal. Looking at the waveforms again, the first one is the waveform of the inductor current, because the current waveform of the load must be continuous, while the current of the MOS tube and the current of the diode are half and half. EMC problem: MOS tubes will produce very high voltage spikes at the moment of turning on and off, depending on the switching frequency. SW is a square wave voltage waveform, which is the ratio of dv/dt voltage change rate and di/dt current change rate. This is where EMC problems occur, and the other is self-excited oscillation. EMC problem: The noise of the diode comes from its reverse recovery.

2: BOOST topology

BOOST working principle: opening loop:

The red part in the above figure is the opening loop. When the MOS tube is turned on, the current flows through the MOS tube to store energy in the inductor. The current flowing through the inductor begins to rise. At this time, the SW node voltage is the voltage drop of the MOS tube, and the diode withstands the reverse voltage. Without conduction, energy is not transferred to the output end, and the energy at the output end is provided by the capacitor.

BOOST working principle: freewheeling loop:

The blue part in the picture above is the freewheeling loop. When the MOS tube is turned off, the energy stored in the inductor is transferred to the output terminal through the diode. At the same time, the DC input source also provides energy to the load, and the current flowing through the inductor begins to decrease.

Current analysis of BOOST working principle:

In the current environment of BOOST, there are SW nodes. The diode is used for boosting, and there is a problem of reverse recovery. The same is true for the MOS tube, which has switching noise. The biggest difference between it and the buck is that its input current is continuous but the output current is not. Continuous, because the inductor must have continuous current flowing through it. In fact, the EMC problem is similar to that of BUCK, so I won’t go into details.

Three: BUCK/BOOST topology

BUCK/BOOST working principle: voltage reduction function:

The Q1 and Q3 tubes are turned on, and the Q2 and Q4 tubes are turned off, completing the Buck circuit opening loop; the Q2 and Q3 tubes are turned on, and the Q1 and Q4 tubes are turned off to complete the Buck circuit freewheeling loop.

BUCK/BOOST working principle boost function:

The Q1 and Q4 tubes are turned on, and the Q2 and Q3 tubes are turned off, completing the Boost circuit opening loop; the Q1 and Q3 tubes are turned on, and the Q2 and Q4 tubes are turned off to complete the Boost circuit freewheeling loop. In addition, this circuit can also be used in reverse.

Current analysis of BUCK/BOOST working principle:

The current mode of this topology is similar to that of buck and boost, so I won’t go into details.

02

Analysis of causes of DC-DC EMC problems

1: Inductance (space radiation of inductor magnetic field, eddy current effect generated by coupled inductor magnetic field)

Several types of BUCK inductors are usually used: magnetically shielded inductors, non-magnetic shielded inductors, ring inductors and I-shaped inductors. Different inductors produce different effects. Toroidal inductor: Its magnetic circuit is closed, no magnetic field leaks into the air, and the magnetic leakage is relatively small. I-shaped inductor: Its magnetic field changes form a closed loop. It is a non-magnetic shielded inductor. A lot of magnetic field falls into the air, causing magnetic field coupling. Magnetic shielding inductor: unable to leak magnetic fields. Non-magnetic shielded inductors: Will leak magnetic fields. EMC problem: Inductor magnetic field radiation, taking the I-shaped non-magnetic shielded inductor as an example, magnetic field radiation will be generated when the pulsating current flows through, and the low-frequency magnetic field will be induced in nearby signal circuits and magnetic components (common mode inductors, differential mode inductors) Voltage and induced current can cause signal interference or cause other problems; when a low-frequency magnetic field passes through a nearby metal plane, it will produce an eddy current effect. If the eddy current noise cannot be effectively eliminated, serious radiation problems will occur. Solution: If you have enough budget, you can directly use magnetic shielding inductors, which can avoid this part of the problem.

EMC problem: If the common mode inductor is too close to the power supply inductor, it will cause mutual inductance problems. EMC problem: Two-wire split-wound common mode inductors have different problems than two-wire parallel-wound common mode inductors. In various materials, it is said that the inductor needs to be double-wound and double-wound. So why should it be double-wound? When the two wires are wound in parallel, the energy induced by the two wires is the same, and the subtraction almost cancels it out.

EMC problem: Next is eddy current. When the inductor is close to metal, eddy current will be generated. As shown in the picture above, if the inductor of the display is too close to the metal bracket, eddy current will be generated. Then the metal bracket becomes an antenna. Solution: The first is to replace the inductor with a shielded inductor, and the second is to ground the metal bracket so that the eddy current energy generated by it returns to its origin and the loop is kept to a minimum.

2: Switching noise (MOS tube switching noise, diode freewheeling switching noise) and parasitic parameters (power device parasitic parameters, PCB parasitic parameters, device + PCB parasitic parameters, structural assembly parasitic parameters)

EMC issues: The relationship between switching noise and radiation. When the power device works in the switching state, the di/dt loop will generate a magnetic field and the dv/dt node will generate an electric field; the high-frequency current loop and the high-frequency switching node will generate alternating magnetic fields respectively. and alternating electric fields, causing serious space radiation problems.

EMC problem: As can be seen from the figure below, the SW signal oscillation of the switching waveform causes ringing. This voltage will be very high, even higher than the voltage stress of the MOS tube. When the stress is higher, it will breakdown the MOS tube (the same goes for the diode) and burn out the entire circuit. . So how does this ringing occur? As you can see from the picture on the right above, if you expand this waveform, you can find a signal with a frequency of 220M. This signal is ringing. Next, we will discuss how it is generated.

Generation of ringing: When the MOS tube is turned on, the freewheeling diode parasitic capacitance CB3 is charged, and the parasitic inductors LB3 and LB4 accumulate energy. When the voltage of the SW dynamic node is equal to the input voltage, the energy accumulated in LB3 and LB4 is generated by the CB3 capacitance. LC series resonance produces overshoot ringing interference. Therefore, it can be concluded that the overshoot ringing is actually caused by the freewheeling diode.

Generation of ringing: When the MOS tube is turned off, the freewheeling diode is turned on, and current continues to flow in the inductor. The parasitic capacitance CB1 of the switching MOS tube is charged, and the parasitic capacitance CB3 of the freewheeling diode is discharged. When the output voltage SSW is the switching point voltage When the switching MOS tube's parasitic capacitance CB1 stops charging, the energy stored in the parasitic inductances LB3 and LB4 forms an LC series resonance with CB1, causing undershoot ringing noise interference. Therefore, it can be concluded that the undershoot ringing is the parasitic capacitance of the MOS tube. produced.

It can be summarized from the above: EMC problems: When overshoot ringing and undershoot ringing exist at the same time, it means there is a problem with the loop and there is a problem with the PCB wiring. Solution: If the parasitic oscillation changes after replacing a MOS tube or diode or even connecting a magnetic bead in series, it means that the parasitic capacitance or parasitic inductance has changed. In fact, the frequency of the parasitic oscillation has also changed. But if a magnetic bead is connected in series, it will bring about a new voltage stress problem and wiring problem. As shown in the left picture below, the trace of the BOOST diode is too long, resulting in a very serious parasitic oscillation waveform. After optimization, as shown in the right picture above, it can be found that the oscillation is reduced a lot. The diode is connected to a capacitor, and The capacitor is close to the pin of the diode. At this time, the parasitic oscillation of the wire from the diode to the capacitor can be basically offset. It can be seen that problems that can be avoided by wiring should be avoided by wiring as much as possible. If absorption is added, it will cause ripple problems; if magnetic beads are added, it will cause stress problems.

Causes of parasitic oscillation: PCB parasitic inductance reduces the high-frequency bypass effect and produces parasitic oscillation; power device parasitic capacitance provides a high-frequency current coupling path, producing parasitic oscillation; PCB parasitic capacitance causes near-field coupling; high-frequency bypass capacitance and PCB parasitic Inductance causes parasitic oscillations. Parasitic oscillation is the main factor in the generation of high-frequency radiation and high-frequency noise. At the same time, parasitic oscillation can change parasitic inductance and parasitic capacitance.

Regarding the influence of parasitic parameters, because the parasitic parameters are too complex, each component (diode, MOS tube, PCB) has parasitic parameters, as well as the distribution parameters of the structure, which is very difficult to blend together.

Three: Current loop (opening loop, closing loop, main power loop, high-frequency loop)

The size of the magnetic field formed by the high-frequency circuit loop depends on the loop area and current size. The smaller the area of ​​the high-frequency current loop, the better the magnetic field cancellation effect. On the contrary, the larger the area of ​​the high-frequency current loop, the better the magnetic field cancellation effect. The worse it is, the stronger the space radiation is. All textbooks will say that the current loop should be kept to a minimum. Why? For a circuit, there are two lines, positive and negative. One goes out and the other goes back. The direction of the current is completely opposite. The magnetic field generated at this time can be completely canceled out. There will be no interference to the outside world and there will be no energy outside the loop. If the loop is minimized, this can be guaranteed. The longer the loop means the longer the wiring, which will have the influence of parasitic inductance and produce parasitic oscillation. The effect of parasitic oscillation is very unsatisfactory. If the switch chip works at a frequency of 200K, 200M may occur. status. The second benefit of having a minimal loop is that it can avoid the occurrence of spurious oscillations.

If we want to ensure that the loop is minimal, we need to know how the loop moves, and what to do to keep the loop minimal. Next, analyze the case in the figure below. Case 1: As shown in the picture below, this is a dcdc filter capacitor. In actual application, via holes will be drilled in place to connect to the ground. As shown in the left picture below, the problem is that the via holes to the bottom layer do not work as expected. , as shown in the picture on the left, drilling a via hole for grounding is equivalent to making the GND go around a circle and grounding it, which increases the loop size a lot. If the position of the capacitor is changed to the picture on the right, the grounding point of the capacitor is now It is the reference ground of the chip. At this time, its loop is unique. It is a loop that goes directly from the top layer back to GND. Since there is parasitic inductance in the via, for high frequencies, the parasitic inductance will choose this smallest path to return. , which can be directly grounded and avoid unnecessary loops. Then look at the second case.

Case 2: As shown below, this is a boost. The output of the boost has a diode and then passes through the capacitor. The grounding method of the capacitor should be connected to the GND of the MOS tube. In this case, the boost loop of the capacitor is minimal. , the output capacitor in the left picture above is directly connected to the GND of the bottom layer, and then returned to the chip from the bottom layer. This will cause the loop to be too large, resulting in serious radiation in the low frequency band, as shown in the left picture below, if it is changed to the right picture, By connecting the capacitor to ground from the top layer, you can see that the radiation becomes much lighter.

Four: Feedback (feedback circuit design, feedback loop)

The feedback signal is fed back to the internal op amp of the chip according to the weight of the load to adjust the information window of the switch control; the feedback signal itself is unstable and the information fed back to the chip is wrong, which will cause the chip to misadjust and cause the output voltage to drop or rise. , back-end electrical equipment may have abnormal working conditions or even be damaged due to voltage fluctuations.

Value of feedback resistor:

Current DCDC power modules mostly use current feedback. If a weak current flows through a large resistor, it will be easy to generate voltage, and it is easy to detect the transformation of the DCDC output voltage. At this time, there is a misunderstanding, that is It is thought that the larger the resistance, the smaller the current, the more obvious the voltage change, and the more sensitive the feedback. However, if the resistance is larger, it means more voltage drops. When the voltage fluctuates, the voltage across the resistor will change. It is too stable, and the smaller the resistance, the smaller the potential difference with the DC output, and the more stable it is. However, if the resistance is smaller, it will cause the problem of slower feedback response. To sum up, the resistance needs to be compromised. Generally, use k-level or 10k-level resistors. Do not use 100k-level resistors. 100k-level resistors will easily deviate.

Feedback signal stability:

The factors that affect the stability of the feedback signal are divided into feedback signal circuit design and feedback signal PCB design. Feedback circuit design: The most important thing is the design of the voltage dividing resistor parameters, and then the feedforward capacitor compensation. Add a capacitor feedforward compensation on the upper bias resistor of the voltage dividing resistor or add a capacitor on the lower bias resistor to achieve the desired effect. Compensation or filtering effects. Feedback signal PCB design: The first is where the feedback power is taken from. Sometimes if it is taken from before the filter capacitor, the feedback itself will have noise, so the feedback must be taken after the filter capacitor. The second is to add ground wires on both sides of the feedback for shielding. If there is a power supply or other signal next to it, crosstalk will definitely occur. The third is that the feedback signal must be processed by differential wiring. The fourth is that the loop area must be small and the feedback line must be as short as possible. If the feedback line is stretched too long, it is easy to receive interference from external signals, and the influence of the feedback line is also limited. It will be huge. Fifth, the feedback signal should be kept away from interference sources, such as those with large currents, strong signals, and those with inductors.

Five: Turn on the control signal (EN pin turn-on voltage setting, EN pin control signal wiring)

Many chips have on and off actions. This is the control signal. The EN pin is the switch control pin that controls the DCDC chip. The stability of its control level is an important condition for the DCDC chip to work reliably. If it is designed at this voltage Problems will cause EMC, and the first one is immunity. EMC problem: When the control level is set at the boundary value of the chip's turn-on voltage, if the EN pin voltage fluctuation deviates from the chip's threshold voltage during the immunity test, the DCDC chip will be accidentally turned off, causing the output voltage to drop, causing the back-end Electrical equipment is working abnormally. EMC problem: The EN pin voltage is supplied by a voltage divider resistor. If the output voltage of the designed voltage divider resistor is higher than the recommended voltage given in the chip manual, there is no problem under normal circumstances. However, when doing lightning surge and other tests, the EN pin Voltage fluctuations may cause mis-turning on or off. If there is mis-turning off and there is no large electrolytic capacitor at the output end to compensate for energy, problems will arise. For example: The picture below shows that the EN pin bias voltage is set too low, and the back-end circuit of the electrostatic discharge test works abnormally.

For example: The picture below shows that the EN pin bias voltage is set too low, and the back-end chip works abnormally during the lightning surge test.

Generally, if given directly, the EN pin voltage is recommended to be designed to be above 2.8V (if the chip specifications allow it). If the EN pin has timing, you must consider the charging of the chip. If the driving voltage of the GPIO is not enough, problems will also occur.

03

Debugging Tips for DC-DC EMC Issues

1: Debugging output voltage problems

For DCDC power supplies, the first priority is to ensure the stability of the output voltage, if the output voltage drops. First: Countermeasures for the EN pin. Add a high-frequency filter capacitor to the EN pin, adjust the voltage value of the pull-up power supply, control the signal protection design of the EN pin, and adjust the voltage dividing resistor parameters. Second: Countermeasures for the feedback circuit. Add a high-frequency capacitor to ground on the feedback pin to filter out clutter. Add a feedforward capacitor to the feedback signal to accelerate the feedback speed. Adjust the proportion of the feedback voltage dividing resistor. Third: Countermeasures to stabilize the output voltage. Add electrolytic capacitors to discharge to compensate for insufficient output voltage. Add Zener diodes to ensure that the output voltage is stable at a value to avoid excessive output voltage from burning out the subsequent load. Add energy storage components.

2: Debugging of loop area issues (opening loop, freewheeling loop, main power loop area, loop low-frequency magnetic field radiation, common loop coupling, heat dissipation)

First, let’s look at the current loop. As shown in the figure below, all DCDCs have a power ground. Sometimes high-frequency bypass loop capacitors may be added to the circuit, so this capacitor should be connected to the power ground. For buck, if the ground point of the diode is used as the reference point, the output high-frequency capacitance will return to the diode. At this time, the freewheeling loop is minimal. For the turn-on loop, C1 and C2 The ground is connected to the diode, and flows from C1 to the inductor, then to C2, and then back to C1. At this time, the loop is smallest, and the same is true for the main power loop. The previous analysis was about high frequency, and next we will look at low frequency. Low frequency has nothing to do with parasitic inductance (the inductance of parasitic inductance is about 0 at low frequency).

At this point we can understand that drawing schematic diagrams is very important. When drawing schematic diagrams, we can develop the habit of clearly marking loops and paths (as shown in the figure below), so that we will have a reference when drawing PCBs. Next, look at the parasitic loop. As shown in the figure below, the reference ground in the circuit is actually not a ground to the earth. When a wire is led out from the module and connected to the earth, then the parasitic inductance of this ground wire exists. When it is very high frequency, as you can see in the picture on the right below, it is equivalent to forming a lot of parasitic capacitance and then connecting it to the ground. This kind of path is generally uncontrollable and will form a potential difference. At this time, we have to let it go as far as possible. Maybe if you follow the path of the schematic diagram, you need to ground at multiple points so that there is no potential difference at each grounding point.

Then look at common current loop coupling. It is two current loops that share a common path. The weak signal is interfered by the strong signal, and the clean signal is coupled by the noise signal. It is one of the main forms of interference problems and one of the important reasons for excessive conduction tests. When drawing the PCB, the analog ground and the digital ground should be separated, the audio ground and the video ground should be separated, etc... But at this time we will find that none of them can reach the standard during the final test. The theory of all ground separation is No problem, but you need to understand what the original intention of ground separation is. The original intention of ground separation is to solve the common loop coupling, common impedance coupling, and current discharge (for example, during a lightning strike, the lightning current flows directly to the ground without passing through the circuit. If you want the current to flow in a certain direction, the impedance in a certain direction must be designed to be the lowest). As shown in the right figure below, the DCDC current loop and the network port loop are the same loop. At this time, when measuring the conduction at the network end, the switching frequency of the dcdc chip appears, and when testing the ground loop, the oscilloscope clamp is clamped in different places, and the loop will change. If the other clamps in the upper right corner are clamped at this time, equipment, you can find that the ground loop becomes longer, and the noise of the dcdc module will also be introduced to the network.

Then there is the issue of the inductor magnetic field. First, you can consider replacing the magnetic shielding inductor to prevent magnetic field leakage and cut off the magnetic field coupling path. This will increase the cost. The second is distance control, which attenuates the magnetic field intensity through space. Finally, a magnetic field can be used to pass through the metal to produce an eddy current effect. The eddy current magnetic field and the original magnetic field cancel each other out.

Three: Debugging switching noise problems

For switching noise, it is sometimes believed that conduction loss is equal to turn-off loss. In fact, this is wrong and must be designed separately. For example, sometimes you want the conduction speed to be slower and the turn-off speed to be faster. Sometimes if the conduction cross area is large, the conduction loss will be relatively large. At this time, the MOS tube conduction speed will be slower. But if the turn-off cross-over loss is small, it does not matter even if the conduction speed is fast. But at this time, you can actually design two different drivers and different loops separately. Nowadays, some chips have frequency jittering function (more details on this separately), which can also reduce EMI. Solution: Reduce the switching frequency. When the switching frequency is low, the switching noise and parasitic oscillation will be relatively small. As for the disadvantage of low switching frequency, the radiation of the low-frequency magnetic field generated by the inductor is relatively strong. Since the magnetic field is easily attenuated by space, the more High-frequency magnetic fields are easier to attenuate, while low-frequency magnetic fields are more penetrating. High-frequency currents are easily affected by inductance, but low-frequency currents are not. Solution: When encountering overshoot ringing and undershoot ringing, you can add an absorption circuit. If the RC design is too small to suppress it, if it is increased, it may cause other problems, and it may be impossible to deal with the oscillation caused by the wiring inside the chip. , you can consider the voltage clamp circuit at this time. There is a sharp contrast between the upper and lower figures.

Four: Debugging parasitic parameter issues

Five: Debugging of conduction and radiation problems

Power supply conduction issues:

Inductor space magnetic field radiation: use magnetic shielding inductor/keep distance from ac power input end

Low-frequency magnetic field radiation of the output power loop: keep the distance from the ac power input end/attenuate the low-frequency noise current in the loop and the common power supply impedance coupling: adjust the PCB wiring and use point-to-point wiring to attenuate the low-frequency noise current on the input power line

Telecom end conduction issues:

Common power supply impedance coupling: adjust PCB wiring to adopt point-to-point wiring method/attenuate low-frequency noise current on the input power line

Common ground loop coupling: Separate the power signal loop from the DCDC input noise/attenuate the low-frequency noise current on the input power line/place the DCDC circuit away from external terminals Telecom side circuit parameter adjustment: Bob Smith circuit parameter adjustment/Bob Smith circuit capacitor grounding point Selection/Telecom differential signal and buck inductor distance control/buck inductor uses shielded inductor

Loop area problem: open loop area control/freewheeling loop area control/open high-frequency bypass loop area/freewheeling high-frequency bypass area Parasitic parameter influence: switching MOS tube parasitic capacitance/PCB wiring parasitic inductance/synchronization MOS tube parasitic capacitance/dynamic line distributed capacitance/freewheeling diode parasitic capacitance filter design: adding high-frequency magnetic beads to the switching loop or freewheeling loop/synchronous switching MOS tube RC absorption/switching MOS tube RC absorption/input power supply filtering design / Freewheeling diode RC absorbs parasitic oscillation: Switching MOS parasitic capacitance and PCB wiring parasitic inductance oscillate / Freewheeling diode parasitic capacitance and PCB wiring parasitic inductance oscillate / Synchronous switching MOS tube parasitic capacitance and PCB wiring parasitic inductance oscillate / PCB wiring parasitic inductance and High frequency open circuit parasitic oscillation

04

Analysis of DC-DC EMC design key points

1: Schematic design

RC absorption design, high frequency bypass design, correct application of magnetic beads:

The problem of inserting a magnetic bead is generally where the oscillation occurs, and the magnetic beads are stringed there. The purpose of the magnetic beads is to solve the problem of parasitic oscillation. If the trace from the MOS tube to the diode is too long, which will cause parasitic oscillation, then string it Here, if it is parasitic oscillation caused by the long trace from the MOS tube to the inductor, then string it there, or you can directly leave the pre-soldered position, and string it where there is a problem. Then look at the design of BOOST, as shown in the picture below, the principles are basically the same.

Filtering and protection design:

Design of filtering and protection for power supply and external connections, electrostatic discharge protection and lightning surge protection. Differential mode lightning protection and common mode lightning surge protection. Differential mode filtering and common mode filtering, high frequency filtering and low frequency filtering design. If it is an external port, you need to consider lightning surge protection, differential mode protection, and common mode protection. You can connect a TVS tube in parallel between the positive and negative for differential mode protection. The positive and negative are connected to the ground respectively for common mode protection, and the X capacitor is used for differential mode. Bypass, the Y capacitor acts as a common mode bypass to prevent external cables from inducing external noise, and the two common mode inductors form a pai type filter circuit. The last capacitor in the picture below can sometimes be omitted because it has a lot to do with the noise source. The so-called inductive load generates voltage and the capacitive load generates current (contrary to common sense), because the inductor will produce an induction when it is turned on and off. The electromotive force responds to sudden changes in current, and this is where the noise comes from. The current changes rapidly when the capacitor is charging and discharging. If there is a large voltage component, the bypass effect will be different if a capacitor is added in front. If there is a large current component, it doesn't matter if the capacitor is added, because the capacitor impedance is relatively low (high frequency noise). Generally speaking, it is necessary to Design based on inductance. If CX2 is not added, two inductors are connected in series, and the two-stage filtering will become one-stage. Generally speaking, this filter can be adjusted very flexibly. All soldering positions should be reserved during PCB design, because there is no Know what the actual noise is like, and then design the filter circuit after actual debugging.

2: PCB design

Regarding stacking, the high-speed signal process is related to stacking, and the power supply is also related to stacking. Due to power reasons, many multi-layer boards are used, and multi-layer boards bring changes to the loop. Therefore, stacking and loop Road design also needs attention. For DCDC, the first thing is the reference ground to ensure the smallest loop. For multi-layer boards, the middle layer can be used as a reference, but the reference ground must be ensured to be on the same layer, otherwise the loop area will rise linearly.

Review Editor: Huang Fei

#Analysis #DCDC #EMC #problems