Application of AM3352 and EMMC communication detection level conversion chip TXB0104

Infineon / Mitsubishi / Fuji / Semikron / Eupec / IXYS

Application of AM3352 and EMMC communication detection level conversion chip TXB0104

Posted Date: 2024-01-30

TXB0104 is a bidirectional automatic detection level conversion chip used in communication between AM3352 (Sitara MCU/MPU, etc.) and EMMC (embedded multimedia memory card) chips. When the system's software resource configuration is insufficient and the level conversion chip is required to identify the signal transmission direction by itself, attention needs to be paid to the external hardware design, otherwise the mount may fail in good and bad times.

Problem background:

The mounting of EMMC and AM3352 failed, and it was determined that TXB0104 was working abnormally. During the actual measurement, it was found that the line in the figure is as follows:

  1. Only the D0 channel has no signal, because the D0 data line is flown from the main chip (AM3352) side to the EMMC, D0 starts transmitting data signals, and the eMMC is mounted normally (in this case, D1/2/3 can also be measured on the AM3352 side) data waveform);
  2. Pass the D0 flying wire across the conversion chip and disconnect D2 (between the conversion chip and eMMC). The mounting fails; - Combining 1 and 2, it means that D2 needs to be used when mounting, and at the same time, the two-way power supply is connected. The D2 channel in the flat conversion chip is normal;
  3. Cross-solder the D0 and D2 data lines in the corresponding level conversion channel in U7, and test that D0 has no signal (D1/2/3 also has no waveform when D0 has no signal), and the eMMC mount fails;
  4. Pass the D0 flying wire across the conversion chip, and connect the D2 data line to the D0 channel of U7, and it can be mounted normally; - The D0 channel in the bidirectional level conversion chip is normal, but it is abnormal after connecting the D0 data;

Figure 1. Circuit diagram of the abnormal board

The D0 signal waveforms of a board that is mounted intermittently during normal and abnormal conditions are as follows:

Figure 2. Normal (top) and abnormal (bottom) mounted board transmission signal D0 channel waveform

Issue focus:

After checking the circuit diagram, I found that OE is pulled up to 3.3VCCB. The specification clearly states that during power-up, OE must remain low until the power supply is stable.

Figure 3. The power-on sequence of OE stated in the specification

Now, the VCCB power-on timing and the OE pin waveform are sampled through the original resistor voltage division at the same time, and it is found that OE and VCCB are powered on at the same time.

Figure 4. Original resistor voltage division timing sequence: OE and VCCB are powered on at the same time

The low-level state recognized by VOLB is up to 0.4V in the 3.3V power supply state, so the time VOE remains low must be extended to ensure that the IC recognizes the low-level state.

Figure 5. High and low level threshold comparison

Rectification program:

In order to ensure that OE maintains a sufficiently low level during power-on, it is recommended to replace the R24 resistor with a 1uF capacitor. The method of using capacitors instead of resistors can appropriately increase the RC time constant to stabilize the time that OE remains low.

Figure 6. Rectification plan based on the original circuit

Re-sample the VCCB power-on sequence and OE pin waveform through the original resistor voltage division, and find that the voltage sequence of the 1uF capacitor is expanded (t=1/RC), and the time that OE remains low (

Figure 7. enable recommended time

Figure 8. VCC and OE ramp time increases

analysis Summary:

After testing and analysis, extending the low-level time of OE can effectively avoid handshake failure between the MCU and EMMC chip.

The reason why the chip transmission fails is because the transmission port of TXB0104 is in an unstable state during power-on.

If the OE pin of TXB0104 is not pulled low, the transmission ports A and B will be in an unstable state (low level, high level or high impedance state) during power-on. At this time, the EMMC connected to the transmission ports A and B is required. The I/O ports corresponding to the MCU should remain in a certain high-impedance state at this time to ensure that the I/O ports of the EMMC and the MCU will not be short-circuited during power-on. If the OE pin of TXB0104 is pulled low during power-on (the ground resistance is replaced by a capacitor), then the transmission ports A and B are in a certain high-impedance state and have no impact on the I/O of the connected EMMC and MCU. The signal can be transmitted normally.

Therefore, hanging a capacitor on the OE port can ensure that the transmission port remains in a certain high-impedance state during power-on, and the fault can be eliminated.

In order to simplify the design analysis of the user system, the following uses a flow chart to sort out the application possibilities of the system corresponding to each state of the TXB0104 I/O port, so as to avoid errors in signal judgment caused by similar unsteady transmission.

Figure 9. I/O port status flow chart

#Application #AM3352 #EMMC #communication #detection #level #conversion #chip #TXB0104