Causes and solutions for poor signal integrity
1. Influence of voltage drop of line resistance - low level increase caused by ground level (0 level) DC
The dotted line in the figure shows the improvement. The improvement is related to the power consumption of the IC, IC density, feeding method, ground wire resistance (R), and the total feed ground current. ΔVground = ΔI× ΔR
2. Influence of voltage drop of signal line resistance
a) The IC output pin goes to the input pin of another IC through printed wires or cables,
The output low-level current causes a low-level rise on the printed wire or cable resistance, the value of which is ΔVOL=IOL×R. See the upper dotted line in the picture.
Obviously, the rise of the low level is related to the resistance value of the printed wire and the output low level current, as shown in the figure below:
The low level at point B is higher than the low level at point A
Note: When the IC output pin is low level, if the device is not a driver but a general device, the output transistor will exit the saturation zone and enter operation because the output low-level current is too large, much larger than the value given in the device manual. district,
Make the output low level much higher. As shown in the upper dotted line in the figure below:
Determining factor: Termination method
Termination resistance size
Output tube saturation depth
Output tube β value
b) The IC output pin passes through the printed wire or cable to the input pin of another IC. The output high-level current causes a high-level decrease in the printed wire or cable resistance, and its value is ΔVOH=IOH×R, See the lower dotted line on the high level in the figure below:
IOH is determined by the following factors: termination method, termination level, termination resistance size
R is determined by the following factors: line width, line thickness, line length
Obviously, the reduction of high level is related to the resistance value of printed wire or cable and the output high level current, as shown in the figure below:
The high level at point B is lower than the high level at point A
Note: When the IC output pin is at high level, if the device is not a driver but a general device, the output high-level current will be too large, much larger than the value given in the device manual, and the output tube will also exit the saturation zone and enter working area, so that the output high level is reduced a lot. As shown in the lower dotted line in the figure below:
3. Influence of voltage drop due to power line resistance
The power supply voltage of the IC (such as +3.3V), if there is a difference in the system, when it is less than +3.3V, the output high level will produce a falling value, as shown by the dotted line on the high level in the above figure:
Since the system power supply is divided into centralized power supply and decentralized power supply module, this difference is different. Due to the size of IC power consumption, IC density, feeding method, the feeding resistance value of the power line and the power supply current value, a ΔVCC (ΔVCC =ΔI×ΔR)
The above reasons make the TTL signal waveform far away from the ideal waveform. The low level is greatly improved, and the high level is also greatly reduced. If these values are not strictly controlled, it will be detrimental to the stable and reliable operation of the system. In addition, the junction temperature difference, that is, the different temperatures of the PN junctions of devices with different power consumption, will also affect changes in high and low levels and threshold levels, and will also affect the operation of the system.
In addition to the DC component mentioned above, what is more important is that the system operates at extremely high frequencies. That is to say, the devices and wires in the system have signals of various frequencies and conversion rates acting and transmitting. . The first is the electromagnetic coupling (crosstalk) of signals between each other and the reflection of signals on transmission paths with different characteristic impedances, as well as the power supply and ground levels. Due to the high-frequency conversion of the IC, the current spike level is caused, making the TTL signal waveform worse. .
4. Conversion noise
When the system is working, the devices switch at high frequencies, causing high-frequency changing current spikes on the power supply system. The power supply lines and ground lines can be regarded as small resistors, inductors, and capacitors. If the current peak value is too large, a large AC peak voltage will be generated on them. The peak voltage on the power supply will basically crosstalk to a high level, while the peak voltage on the ground level will crosstalk to a low level. As shown in the figure below: This kind of spike voltage also exists inside the IC.
5. Crosstalk noise
As the system assembly becomes denser and denser, the distance between printed conductors becomes closer and closer, and there are high-speed switching level signals on adjacent conductors. For example, the positive transition time tr and the negative transition time tf are both very small, causing a large electromagnetic coupling signal (crosstalk signal) to be superimposed on the existing signal on the wire. The larger spike signal is shown in the picture below. These signals also include crosstalk signals between the signal pins on the header and between signals in the cable.
Determining factors: tr and tf values, line width, line spacing, thickness of (substrate) medium, dielectric constant of the medium, parallel line length, overlapping line length, plug socket signal pin to ground ratio, cable signal line to ground ratio .
6. Reflection noise
If the interconnection lines between ICs are relatively long (which is often the case in complex systems), the characteristic impedance of the lines is uneven, or the terminals are not matched, it will cause reflections. If the beginning ends are not matched, they will be reflected back and forth, causing ringing. As shown below:
Determining factors: characteristic impedance, matching method, mismatch size
Terminal reflection coefficient, starting reflection coefficient, line length
7. Edge distortion
If the signal frequency rises to a certain level, that is, the device operating frequency reaches a certain height limit, and the printed wire is long or the load capacitance is large, tr ≥ tw rise time is equal to or greater than the pulse width, and the signal is distorted to the point where there is no high or low. Level flat top or stay away from flat top. As shown in the figure below (solid line):
For example, "simulation or actual measurement with an oscilloscope" can be used for verification.
Determining factors: line width, line length, substrate dielectric thickness, dielectric permittivity, load number, operating frequency (pulse width), and changes in tr digital signals. After discussing the above seven items, it can be seen that its distortion cannot be ignored. If it is allowed to flow without strict restrictions, the system will not be able to work stably and reliably.
Review Editor: Huang Fei
#solutions #poor #signal #integrity
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