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Design of Frequency Attribute Tester Based mostly on DDS and FPGA

Design of Frequency Attribute Tester Based mostly on DDS and FPGA

Posted Date: 2023-06-19

Frequency traits are the response traits of a system (or element) to sinusoidal enter alerts of various frequencies. As proven in Determine 1, the enter of the system beneath take a look at is a sinusoidal sign with an amplitude of Ar and an angular frequency of ω. If the system is linear, its steady-state output can be a sinusoidal sign with a relentless frequency of ω and an amplitude of Ac. The angular distinction is φ. Altering ω can get a sequence of enter and output knowledge.

1 Introduction

Frequency traits are the response traits of a system (or element) to sinusoidal enter alerts of various frequencies. As proven in Determine 1, the enter of the system beneath take a look at is a sinusoidal sign with an amplitude of Ar and an angular frequency of ω. If the system is linear, its steady-state output can be a sinusoidal sign with a relentless frequency of ω and an amplitude of Ac. The angular distinction is φ. Altering ω can get a sequence of enter and output knowledge. The output-to-input amplitude ratio A(ω)=Ac/Ar and the connection curve of ω is known as the amplitude-frequency attribute of the system, and normally 20 lg A(ω) is known as the logarithmic amplitude-frequency attribute. The connection between the output-to-input section angle distinction φ(ω) and ω is known as the phase-frequency attribute of the system. The mixture of amplitude-frequency traits and phase-frequency traits is known as frequency traits, and the generally used open-loop frequency traits of the system are Bode plots.

Design of Frequency Characteristic Tester Based on DDS and FPGA

The frequency attribute of a system could be decided by a frequency attribute tester. Frequency attribute tester, additionally known as frequency sweeper, is used to check the amplitude-frequency attribute of the community beneath take a look at. It will probably measure the resonant frequency, bandwidth, out-of-band attenuation, acquire, and so forth. of the community beneath take a look at, and is without doubt one of the generally used units within the subject of electronics. The analog frequency sweeper is dearer, and can't instantly acquire the phase-frequency traits, not to mention save the frequency attribute diagram and print the frequency attribute diagram, which brings quite a lot of inconvenience to the consumer. Due to this fact, this digital frequency attribute tester is just not included. .

2. General design

The one-chip microcomputer controls the sign supply to generate an ordinary sine wave, which is enter to the community beneath take a look at; the output of the community beneath take a look at is enter to the amplitude detection circuit and the section detection circuit respectively, and the height worth and section distinction worth are obtained and despatched to the single-chip microcomputer for processing; the outcomes of the single-chip processing are offered on the one hand. Actual-time Display to the LED, then again, it's saved within the reminiscence for the oscilloscope to display the amplitude-frequency and phase-frequency curves. The general body is proven in Determine 2.

Design of Frequency Characteristic Tester Based on DDS and FPGA

2.1 Design of frequency sweep sign supply

The frequency sweep sign generator is the core of the frequency attribute tester. It supplies a sinusoidal sign whose frequency modifications periodically inside a sure vary over time for the enter of the community beneath take a look at. The strategies of frequency sweep sign technology embody phase-locked loop (PLL) and preset frequency divider, monolithic built-in waveform generator, particular frequency synthesis machine and direct digital frequency synthesis (DDS) circuit. The system is managed by single chip microcomputer, makes use of EDA expertise, and selects the system programmable logic machine ispCPLD chip to kind a direct digital frequency synthesizer (DDS) to generate scanning sine waves.

Direct Digital Frequency Synthesis (DDS) is a purely digital methodology. As a result of DDS has ultra-high-speed frequency conversion time, extraordinarily excessive frequency decision and low section noise, DDS units can keep section continuity throughout frequency change and frequency modulation, so it's straightforward to attain frequency, section and amplitude modulation. As well as, DDS additionally has the excellent benefit of programmable management. DDS is principally composed of section accumulator, sinusoidal ROM desk and digital-to-analog converter, and so forth. Its core is the section accumulator, which consists of an N-bit word-length binary adder and an N-bit register with clock fclk sampling. Linearly accumulate the frequency management phrase. When the section increment is 1 and the phrase width of the accumulator is 32 bits, the section decision of the output handle equivalent to the waveform is l/232. A sine operate look-up desk is saved within the sine ROM desk, which outputs completely different amplitude codes equivalent to completely different instantaneous section codes. When working, write the management phrase into the section accumulator and convert it into an instantaneous section. Beneath the motion of the exterior reference clock, the section accumulator accumulates the section step as soon as per clock cycle, and the corresponding amplitude code is output to the digital-to-analog converter. (D/A), the digital amount is transformed into an analog amount, after which the ultimate required sign is obtained after smoothing via a low-pass filter. And the analog sine wave is in contrast with a threshold voltage to acquire a sq. wave clock sign of the identical frequency. He shops the amplitude digital amount of the discrete pattern factors of the required sine wave in a single cycle into the ROM, after which presses a sure handle interval ( Part increment) is learn out, and an analog sinusoidal sign is fashioned by a D/A converter, after which a sinusoidal sign with higher high quality is obtained by a low-pass filter.

The frequency f0 of the output waveform of the sign generator is outlined as:

Design of Frequency Characteristic Tester Based on DDS and FPGA

The place fc is the crystal frequency, ok is the frequency division ratio, N is the variety of bits of the section accumulator, and M is the increment (step measurement) of the section accumulator.
On this design, take fc=32.768 MHz, ok=50, N=16, and substitute it into the above components to get:

Design of Frequency Characteristic Tester Based on DDS and FPGA

On this manner, so long as the worth of M is managed, the requirement of frequency step of 10Hz could be precisely realized. Right here the clock frequency is:

Design of Frequency Characteristic Tester Based on DDS and FPGA

Within the components, △section is the frequency management phrase, sysclk is the system clock, clkin is the enter reference clock frequency of the DDS, N is the variety of bits within the frequency register, and M is the variety of bits within the section offset register. The frequency management phrase △section determines the frequency worth of the output sign; the minimal frequency decision is set by the variety of bits N within the frequency register, the bigger the N, the upper the frequency decision; the section decision is set by the variety of bits within the section offset register, and the amplitude Decision is set by the precision of the D/A converter.

2.2 Amplitude-frequency and phase-frequency attribute design

The amplitude-frequency attribute take a look at circuit consists of a peak detector and a D/A converter. The height detector consists of an “op amp” and a detector diode. As proven in Determine 3. He detected the height worth of the output sign of the community beneath take a look at (representing the community amplitude-frequency legislation), despatched it to the 8-bit ADC0809 analog-to-digital converter, after which despatched it to the single-chip AT89C51 for processing after digitization.

Design of Frequency Characteristic Tester Based on DDS and FPGA

The generally used detection strategies within the amplitude-frequency attribute take a look at are peak detection and RMS detection. Nevertheless, because the RMS detection can not meet the frequency variation vary of 500 Hz to 10 kHz as required by the design, peak detection is used. The energetic peak detector is used to appreciate the height worth measurement. The height detector detects the height worth of the enter and output alerts of the community beneath take a look at, after which sends it to the A/D converter to finish the quantization. In truth, because the traits of the D/A and low-pass filter of the sign supply can be sure that the amplitude stays unchanged within the vary of 100 Hz to 100 kHz, one peak detector and A/D could be omitted, and solely the The output sign of the community beneath take a look at.

Design of Frequency Characteristic Tester Based on DDS and FPGA

The phase-frequency attribute take a look at circuit (the block diagram is proven in Determine 4) consists of two zero-crossing comparators, a section detector, a low-pass filter and an A/D converter. The 2 comparators are zero-crossing sign comparators composed of “op amps”, which respectively convert the enter and output sinusoidal alerts of the community beneath take a look at into digital alerts.

The section detector is realized by ETESTER. The section distinction sign of the enter and output alerts of the community beneath take a look at is detected by section detection, and the section shift sign of the community beneath take a look at is obtained after filtering by a low-pass filter, which is distributed to ADC0809 for analog-to-digital conversion into digital amount, after which despatched to the microcontroller for processing. The responsibility cycle of the heart beat sign output by the section detector is proportional to the section distinction between the 2 alerts, particularly:

Part distinction=N1/(N1+N2)×360°

Amongst them, N1 is the rely worth inside the high-level pulse width time, and N2 is the rely worth inside the low-level pulse width time. After two clock alerts PA and PB with the identical frequency and completely different phases go via the section detector epd, one pulse waveform with completely different responsibility ratios might be output. Its frequency is similar because the enter frequency, and the responsibility cycle is expounded to the timing of the rising fringe of the PA and PB alerts. The heart beat width of epd is the same as the time distinction between the rising edges of the PB and PA alerts. This time distinction is PB, which is precisely equal to the responsibility cycle of epd multiplied by 360°.

2.3 Show and printing of frequency traits

There are two show modes within the design of the frequency attribute tester, one is to show the numerical worth by LED, which could be printed out; the opposite is to show the frequency attribute curve with an oscilloscope. The printing methodology we consult with is to design an RS 232 serial port within the system, use the serial port operate of the MCU to speak with the single-chip AT89C51, and use the printing management operate of the PC to finish the printing.

A normal oscilloscope inputs an analog voltage sign, that's, the measured amplitude-frequency attribute and phase-frequency attribute knowledge are transformed into analog voltage by D/A. As a result of the single-channel oscilloscope is used to show the amplitude-frequency and phase-frequency curves, the 2 curves could be displayed at completely different positions on the Screen in time division. With a purpose to facilitate statement, when the output amplitude-frequency attribute knowledge is displayed on the highest of the display, a constructive voltage could be superimposed on the output of D/A. As a result of quick scanning velocity of the oscilloscope, the 2 curves of phase-frequency and amplitude-frequency look like displayed on the similar time. on the display.

3. Conclusion

The quantity of the system is small, as a result of the single-chip microcomputer chosen is AT89C51, and this system of the single-chip microcomputer system is brief, so there isn't any have to develop EPROM and RAM. As well as, because the DDS built-in circuit is used to generate the frequency sweep sign, the standard of the frequency sweep sign is excessive and the frequency sweep vary is huge. Nevertheless, as a result of the system makes use of the point-frequency methodology to measure the frequency traits of the community, the system mapping time is barely longer. To extend the sweep frequency vary of the system, DDS units with larger output frequencies can be utilized.

Experiments present that the system is secure and dependable, the printed amplitude-frequency attribute curve is in line with the curve measured by the standard frequency sweeper, and the drawn frequency attribute diagram is in line with the idea. The operation and use of the software program and the processing of graphic knowledge are very handy, and using the entire instrument could be very easy, which is incomparable with the analog frequency sweeper.

1 Introduction

Frequency traits are the response traits of a system (or element) to sinusoidal enter alerts of various frequencies. As proven in Determine 1, the enter of the system beneath take a look at is a sinusoidal sign with an amplitude of Ar and an angular frequency of ω. If the system is linear, its steady-state output can be a sinusoidal sign with a relentless frequency of ω and an amplitude of Ac. The angular distinction is φ. Altering ω can get a sequence of enter and output knowledge. The output-to-input amplitude ratio A(ω)=Ac/Ar and the connection curve of ω is known as the amplitude-frequency attribute of the system, and normally 20 lg A(ω) is known as the logarithmic amplitude-frequency attribute. The connection between the output-to-input section angle distinction φ(ω) and ω is known as the phase-frequency attribute of the system. The mixture of amplitude-frequency traits and phase-frequency traits is known as frequency traits, and the generally used open-loop frequency traits of the system are Bode plots.

Design of Frequency Characteristic Tester Based on DDS and FPGA

The frequency attribute of a system could be decided by a frequency attribute tester. Frequency attribute tester, additionally known as frequency sweeper, is used to check the amplitude-frequency attribute of the community beneath take a look at. It will probably measure the resonant frequency, bandwidth, out-of-band attenuation, acquire, and so forth. of the community beneath take a look at, and is without doubt one of the generally used units within the subject of electronics. The analog frequency sweeper is dearer, and can't instantly acquire the phase-frequency traits, not to mention save the frequency attribute diagram and print the frequency attribute diagram, which brings quite a lot of inconvenience to the consumer. Due to this fact, this digital frequency attribute tester is just not included. .

2. General design

The one-chip microcomputer controls the sign supply to generate an ordinary sine wave, which is enter to the community beneath take a look at; the output of the community beneath take a look at is enter to the amplitude detection circuit and the section detection circuit respectively, and the height worth and section distinction worth are obtained and despatched to the single-chip microcomputer for processing; the outcomes of the single-chip processing are offered on the one hand. Actual-time show to the LED, then again, it's saved within the reminiscence for the oscilloscope to show the amplitude-frequency and phase-frequency curves. The general body is proven in Determine 2.

Design of Frequency Characteristic Tester Based on DDS and FPGA

2.1 Design of frequency sweep sign supply

The frequency sweep sign generator is the core of the frequency attribute tester. It supplies a sinusoidal sign whose frequency modifications periodically inside a sure vary over time for the enter of the community beneath take a look at. The strategies of frequency sweep sign technology embody phase-locked loop (PLL) and preset frequency divider, monolithic built-in waveform generator, particular frequency synthesis machine and direct digital frequency synthesis (DDS) circuit. The system is managed by single chip microcomputer, makes use of EDA expertise, and selects the system programmable logic machine ispCPLD chip to kind a direct digital frequency synthesizer (DDS) to generate scanning sine waves.

Direct Digital Frequency Synthesis (DDS) is a purely digital methodology. As a result of DDS has ultra-high-speed frequency conversion time, extraordinarily excessive frequency decision and low section noise, DDS units can keep section continuity throughout frequency change and frequency modulation, so it's straightforward to attain frequency, section and amplitude modulation. As well as, DDS additionally has the excellent benefit of programmable management. DDS is principally composed of section accumulator, sinusoidal ROM desk and digital-to-analog converter, and so forth. Its core is the section accumulator, which consists of an N-bit word-length binary adder and an N-bit register with clock fclk sampling. Linearly accumulate the frequency management phrase. When the section increment is 1 and the phrase width of the accumulator is 32 bits, the section decision of the output handle equivalent to the waveform is l/232. A sine operate look-up desk is saved within the sine ROM desk, which outputs completely different amplitude codes equivalent to completely different instantaneous section codes. When working, write the management phrase into the section accumulator and convert it into an instantaneous section. Beneath the motion of the exterior reference clock, the section accumulator accumulates the section step as soon as per clock cycle, and the corresponding amplitude code is output to the digital-to-analog converter. (D/A), the digital amount is transformed into an analog amount, after which the ultimate required sign is obtained after smoothing via a low-pass filter. And the analog sine wave is in contrast with a threshold voltage to acquire a sq. wave clock sign of the identical frequency. He shops the amplitude digital amount of the discrete pattern factors of the required sine wave in a single cycle into the ROM, after which presses a sure handle interval ( Part increment) is learn out, and an analog sinusoidal sign is fashioned by a D/A converter, after which a sinusoidal sign with higher high quality is obtained by a low-pass filter.

The frequency f0 of the output waveform of the sign generator is outlined as:

Design of Frequency Characteristic Tester Based on DDS and FPGA

The place fc is the crystal frequency, ok is the frequency division ratio, N is the variety of bits of the section accumulator, and M is the increment (step measurement) of the section accumulator.
On this design, take fc=32.768 MHz, ok=50, N=16, and substitute it into the above components to get:

Design of Frequency Characteristic Tester Based on DDS and FPGA

On this manner, so long as the worth of M is managed, the requirement of frequency step of 10Hz could be precisely realized. Right here the clock frequency is:

Design of Frequency Characteristic Tester Based on DDS and FPGA

Within the components, △section is the frequency management phrase, sysclk is the system clock, clkin is the enter reference clock frequency of the DDS, N is the variety of bits within the frequency register, and M is the variety of bits within the section offset register. The frequency management phrase △section determines the frequency worth of the output sign; the minimal frequency decision is set by the variety of bits N within the frequency register, the bigger the N, the upper the frequency decision; the section decision is set by the variety of bits within the section offset register, and the amplitude Decision is set by the precision of the D/A converter.

2.2 Amplitude-frequency and phase-frequency attribute design

The amplitude-frequency attribute take a look at circuit consists of a peak detector and a D/A converter. The height detector consists of an “op amp” and a detector diode. As proven in Determine 3. He detected the height worth of the output sign of the community beneath take a look at (representing the community amplitude-frequency legislation), despatched it to the 8-bit ADC0809 analog-to-digital converter, after which despatched it to the single-chip AT89C51 for processing after digitization.

Design of Frequency Characteristic Tester Based on DDS and FPGA

The generally used detection strategies within the amplitude-frequency attribute take a look at are peak detection and RMS detection. Nevertheless, because the RMS detection can not meet the frequency variation vary of 500 Hz to 10 kHz as required by the design, peak detection is used. The energetic peak detector is used to appreciate the height worth measurement. The height detector detects the height worth of the enter and output alerts of the community beneath take a look at, after which sends it to the A/D converter to finish the quantization. In truth, because the traits of the D/A and low-pass filter of the sign supply can be sure that the amplitude stays unchanged within the vary of 100 Hz to 100 kHz, one peak detector and A/D could be omitted, and solely the The output sign of the community beneath take a look at.

Design of Frequency Characteristic Tester Based on DDS and FPGA

The phase-frequency attribute take a look at circuit (the block diagram is proven in Determine 4) consists of two zero-crossing comparators, a section detector, a low-pass filter and an A/D converter. The 2 comparators are zero-crossing sign comparators composed of “op amps”, which respectively convert the enter and output sinusoidal alerts of the community beneath take a look at into digital alerts.

The section detector is realized by ETESTER. The section distinction sign of the enter and output alerts of the community beneath take a look at is detected by section detection, and the section shift sign of the community beneath take a look at is obtained after filtering by a low-pass filter, which is distributed to ADC0809 for analog-to-digital conversion into digital amount, after which despatched to the microcontroller for processing. The responsibility cycle of the heart beat sign output by the section detector is proportional to the section distinction between the 2 alerts, particularly:

Part distinction=N1/(N1+N2)×360°

Amongst them, N1 is the rely worth inside the high-level pulse width time, and N2 is the rely worth inside the low-level pulse width time. After two clock alerts PA and PB with the identical frequency and completely different phases go via the section detector epd, one pulse waveform with completely different responsibility ratios might be output. Its frequency is similar because the enter frequency, and the responsibility cycle is expounded to the timing of the rising fringe of the PA and PB alerts. The heart beat width of epd is the same as the time distinction between the rising edges of the PB and PA alerts. This time distinction is PB, which is precisely equal to the responsibility cycle of epd multiplied by 360°.

2.3 Show and printing of frequency traits

There are two show modes within the design of the frequency attribute tester, one is to show the numerical worth by LED, which could be printed out; the opposite is to show the frequency attribute curve with an oscilloscope. The printing methodology we consult with is to design an RS 232 serial port within the system, use the serial port operate of the MCU to speak with the single-chip AT89C51, and use the printing management operate of the PC to finish the printing.

A normal oscilloscope inputs an analog voltage sign, that's, the measured amplitude-frequency attribute and phase-frequency attribute knowledge are transformed into analog voltage by D/A. As a result of the single-channel oscilloscope is used to show the amplitude-frequency and phase-frequency curves, the 2 curves could be displayed at completely different positions on the display in time division. With a purpose to facilitate statement, when the output amplitude-frequency attribute knowledge is displayed on the highest of the display, a constructive voltage could be superimposed on the output of D/A. As a result of quick scanning velocity of the oscilloscope, the 2 curves of phase-frequency and amplitude-frequency look like displayed on the similar time. on the display.

3. Conclusion

The quantity of the system is small, as a result of the single-chip microcomputer chosen is AT89C51, and this system of the single-chip microcomputer system is brief, so there isn't any have to develop EPROM and RAM. As well as, because the DDS built-in circuit is used to generate the frequency sweep sign, the standard of the frequency sweep sign is excessive and the frequency sweep vary is huge. Nevertheless, as a result of the system makes use of the point-frequency methodology to measure the frequency traits of the community, the system mapping time is barely longer. To extend the sweep frequency vary of the system, DDS units with larger output frequencies can be utilized.

Experiments present that the system is secure and dependable, the printed amplitude-frequency attribute curve is in line with the curve measured by the standard frequency sweeper, and the drawn frequency attribute diagram is in line with the idea. The operation and use of the software program and the processing of graphic knowledge are very handy, and using the entire instrument could be very easy, which is incomparable with the analog frequency sweeper.

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