How to determine the via impedance of a differential pair in a PCB?

Infineon / Mitsubishi / Fuji / Semikron / Eupec / IXYS

How to determine the via impedance of a differential pair in a PCB?

Posted Date: 2024-02-04

Key points of this article:

. Impedance determines the propagation behavior of signals, and each functional component on an interconnect device has a certain impedance.
. For differential signals, the vias will have their own differential impedance, just like the traces in a differential pair have a specific impedance.
. Factors that affect the differential pair via impedance will affect the input impedance observed at the via.

High-speed PCB and signal standards almost all require the following for the use of differential pairs: precise impedance, length matching, signal offset compensation and loss budget. To achieve these important differential signal integrity goals, designers need tools to accurately calculate impedance and understand how differential signals interact with various functional elements on the interconnect device, such as connectors, cables, components, and vias.

Vias should be arranged differentially, just like trace pairs. A via pair has its own differential impedance and therefore its own set of network parameters (i.e., S-parameters). So, what factors affect the via impedance of a differential pair?

The vias on these differential pairs have their own impedance, which can cause signal integrity issues in long interconnects.

1. Understand the differential pair via impedance

Just like traces on a PCB, vias have their own impedance, often described using a lumped circuit model, similar to a transmission line. Understanding how a via behaves like a simple inductor, an LC circuit, or a pure capacitor will help to understand how the via's structure and nearby parasitics affect the via's differential impedance.

The following factors together determine the characteristic impedance of a single via:

Via Inductor: Each via acts like a small inductor filled with a weak magnetic core. While they don't produce as strong a magnetic field as large electromagnets, they still have inductive impedance.

Parasitic capacitance with nearby planes: The direction of wave propagation requires the wave to interact with different types of different impedances. Interactions at one impedance affect interactions at the next impedance.

PCB Laminate Material: The dielectric constant of the PCB laminate also affects the impedance of individual vias.

Once you drive two vias with a differential signal, their differential impedance will be determined by their parasitic capacitance and inductive coupling, just like even-mode and odd-mode transmission lines. Having determined the differential impedance, we now need to calculate the input impedance of the (differential pair) + (via) combination, which determines the S-parameters in the interconnect.

2. Input impedance of differential vias

For interconnects with differential via structures, the calculation of differential impedance is an iterative process; the input impedance is calculated starting at the receiving end and then working back to the load end. The figure below explains the specific principle. The diagram shows a differential pair between the driver and receiver, with a pair of differential vias in between.

Each part of the interconnect has its own input impedance. The differential input impedance of each section depends on the differential impedance of all downstream sections, somewhat like a standard transmission line. We can write the following iterative equations regarding the input impedance of segment i of the interconnect line and the input impedance of the next segment:

Enter the impedance equation

This input impedance will determine the reflections from each section of the transmission line. For a differential signal through a via pair, the input impedance at the via pad may be similar to the differential impedance of differential pair 2, depending on the length of the via and the propagation delay.

Like transmission lines, differential vias have a critical length that determines whether accurate impedance matching is required with the differential pairs on both sides. If the via length is short, the tanh function will be approximately 0 and the input impedance will be the differential impedance of segment (i + 1). This happens with low speed/low frequency signals, so we generally don't have to worry about differential impedance with 10/100 Ethernet, Low Speed ​​USB, or similar differential protocols. But for other protocols, such as Gigabit Ethernet or MIPI protocols, via length is very important and steps should be taken to understand the impact of differential pair via impedance on interconnect loss.

3. Challenges of differential vias

After the above discussion, we summarized the following points:

When the differential via pair is very short, its impedance is not important; the input impedance of the via pair is equal to the input differential impedance of differential pair 2.

When the via pairs are very long, such as in a thicker backplane, the impedance of the differential via pair will determine the impedance mismatch of the propagated signal.

Via stubs are another source of impedance mismatch. When the stub is long, differential resonance will occur.

Use short vias and shorter stubs

To determine the specific application scenario, look at the critical electrical length of the via. Generally speaking, for signals with bandwidths up to about 100 GHz, use shorter differential via pairs and backdrilling techniques to leave shorter via stubs. This solves two problems, but increases the complexity of the routing and stacking design, and increases the overall cost of the system.

Using Differential Mode S-Parameters

To fully summarize the behavior of via pairs, we need to resort to differential mode S-parameters. When the via impedance of the differential pair does not match the input impedance of this part, a certain degree of return loss will occur. The total loss in the high-speed channel (return loss plus insertion loss) needs to be compared to the loss budget in the differential channel, which will be specified in the receiver specification.

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