In 2024, can RISC-V achieve a breakthrough in HPC?
Electronic Enthusiast Network reports (Text/Zhou Kaiyang) Since x86 has dominated HPC for many years, everyone is looking forward to a new architecture that can break this status quo. The 2020 Fugaku supercomputer has achieved this, presenting the Arm architecture to everyone in a first-class manner. But as RISC-V slowly gains more attention, many people are speculating when this new open architecture will make a breakthrough in the HPC field.
The first RISC-V based HPC cluster
Most people may have never heard of the Italian E4 Computer Engineering company, but the LEONARDO system they built in cooperation with EVIDEN is currently the sixth-ranked supercomputer in the world.
They believe that RISC-V is a relatively new architecture in the past ten years, but as more and more manufacturers launch cores with vector extensions and create mass-produced processors based on them, they have also begun to explore RISC -V feasibility on HPC.
Therefore, they built the first RISC-V-based HPC cluster, MonteCimone, based on SiFive's HiFiveUnmatched development board. HiFiveUnmatched is equipped with SiFive's FreedomU740SoC, which integrates four U74CPU cores, and each MonteCimone blade server is equipped with two HiFiveUnmatched development boards.
They have started this project in 2021 as a test bed for RISC-V in HPC applications. Now they have chosen the computing-based SG2042 hardware for the second version of MonteCimone to carry out a new round of testing and verification.
SG2042, RISC-V’s new star in the HPC field
Although Esperanto has launched a RISC-V chip equipped with thousands of cores, it is mainly positioned as an AI accelerator, and there are currently not many public hardware implementations. On the contrary, the SG2042 can be launched. As the first high-core RISC-VSoC that has been commercialized, many hosts have been equipped with this high-performance processor under the promotion of Milk-V and other companies. As mentioned above, MonteCimonev2 is a typical example.
The SG2042, released at the end of 2022, integrates 64 Pingtou Ge's C920RISC-VCPU cores, and the CPU main frequency reaches 2.0GHz. It supports version 0.71 of vector expansion, with L1, L2 and LLC caches of 4MB, 16MB and 64MB respectively, and can be expanded up to 256GB of DDR4 memory. The super performance and 120W TDP make it the industry's first server-level RISC-VCPU processor.
Based on this SoC, Milk-V has launched various hardware such as evaluation boards, hosts, 2U servers, and 16U clusters. It has also donated 50 hosts to the RISC-V Foundation. However, Suaneng does not intend to stop there. In Q1 this year, they plan to release the latest SG2044SoC.
SG2044 will support Vector1.0 extension and Pingtouge's Matrix extension, increase the 64-core CPU frequency to 2.5GHz, and further expand the bandwidth to 300GB/s through LPDDR5x and PCIe5.0. Even the SG2044 plan will support Llama7B with 7 billion parameters and achieve a generation speed of 40Token/s.
write at the end
Although RISC-V's innovative breakthroughs in the HPC field make us look forward to subsequent developments, in actual commercial projects, we still have to question the changes that may occur in the future. For example, considering RISC-V in HPC workloads, What advantages does it provide compared to other architectures? Can AI accelerators based on RISC-V become the most advanced technology architecture in the construction of future supercomputing systems?
These are issues that HPC-related researchers must consider. With the unremitting efforts of various manufacturers, it is quite easy to run an HPC node on RISC-V hardware. However, HPC is a task that particularly requires optimization, whether it is architecture, Optimization of software or instruction sets can significantly improve its operating efficiency. While other architectures already have many years of historical experience, RISC-V still needs to catch up in this regard.
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