Methods for testing power system conversion efficiency
When we complete the design of the power supply solution, after the samples are produced, we need to test various performances of the product. One of them is to test the conversion efficiency of the power supply system to confirm whether it is consistent with the design value.
When actually calculating efficiency, many engineers read the input power directly from the power supply and the output power from the electronic load for convenience and speed. The final efficiency will be far lower than the design value, and they are confused because of this (the component parameters are consistent, Why there is a difference in efficiency), in fact, these are caused by imprecise testing methods. Let’s briefly introduce the correct method of testing the conversion efficiency of the power system.
The correct way to test the conversion efficiency of the power system is that there are resistances on the wires and contact resistances at the bayonet connections between different devices. These resistances will produce corresponding voltage drops and corresponding losses when current flows through them, so we When calculating system conversion efficiency, these additional effects must be eliminated to obtain accurate results. Taking XL6008 as an example, we will introduce how to accurately test the input, output voltage and current values of the power supply system.
First of all, in the current loop, the current value will not be reduced due to the presence of parasitic resistance on the wire. Therefore, as long as an ammeter is connected in series to the input and output ends, the current value can be accurately measured. There are no high requirements for the location where the ammeter is connected.
However, the current flowing through the resistor will produce a voltage drop. If the voltmeter is connected incorrectly, it will affect the test accuracy. We need to place the voltmeter close to the input and output capacitors of the system to avoid the voltage drop caused by the parasitic resistance RJ. ; Please refer to the figure below for the connection method. Also referring to the figure below, let us explain why there is a big difference in the efficiency measured by directly reading the data on the power supply and load.
According to Kirchhoff's voltage law, the voltage equation UAB= UCD+UAC+UDB can be obtained. UAC can be known through the current flow direction. The UDB voltage is positive, so UAB》UCD, and UEF》UGH can be obtained in the same way.
During the system test, the voltage value displayed on the power supply is UAB (the actual voltage that supplies power to the chip is UCD), and the voltage value displayed on the electronic load is UGH (the actual output voltage is UEF), that is, the voltage displayed on the power supply is higher than The actual input voltage, the voltage displayed on the electronic load is less than the actual output voltage, causing the input power displayed by the power supply to be larger than the actual power, and the power displayed by the electronic load to be smaller than the actual output power, so the calculated efficiency may be lower than the design value. Condition.
If the parasitic resistance of the wires and connections is too large, the corresponding calculated efficiency will also deviate greatly.
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