New CXL 3.1 controller IP for next-generation data centers
Rambus blog post
The rapid development of artificial intelligence is triggering profound changes in data centers; computing-intensive workloads place unprecedented high demands on low-latency, high-bandwidth connections between CPUs, accelerators, and storage. Compute Express Link (CXL) interconnect technology opens up new ways to improve data center performance and efficiency.
Facing increasingly complex AI workloads, efficient communication between data center components becomes critical. CXL addresses this need by providing low-latency, high-bandwidth connections that improve overall memory and system performance.
Data center memory challenges
CXL 3.1 offers data transfer rates up to 64 GT/s and provides multi-layer (network connection) switching, enabling highly scalable memory pools and sharing. These features will be key to next-generation data centers, reducing high memory costs and idle memory resources while providing higher memory bandwidth and capacity as needed.
Rambus CXL 3.1 controller IP is suitable for ASIC and FPGA implementation due to its flexible design. It adopts the Rambus PCIe 6.1 controller architecture for the CXL.io protocol, and adds CXL-specific CXL.cache and CXL.mem protocols. Built-in zero-latency integrity and data encryption (IDE) modules provide state-of-the-art security against physical attacks on CXL and PCIe links. The controller can be delivered separately or integrated with the customer's choice of CXL 3.1/PCIe 6.1 PHY.
CXL 3.1 Controller Block Diagram
Neeraj Paliwal, general manager of Rambus Semiconductor IP, said: "The performance needs of generative AI and other high workloads require new architectural solutions powered by CXL. Rambus CXL 3.1 Digital Controller IP extends our leadership in this critical area, Providing our customers' cutting-edge chip designs with the throughput, scalability and security of CXL's latest evolution of the standard.
CXL is a key interconnect technology for data centers that addresses the many challenges posed by data-intensive workloads. Join Lou Ternullo in our upcoming webinar, "Unlocking the Potential of CXL 3.1 and PCIe 6.1 in Next-Generation Data Centers," to learn how CXL and PCIe interconnect technologies can help designers optimize data center memory infrastructure solutions.
#CXL #controller #nextgeneration #data #centers
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