Top ten EDA/IP keywords in 2024: What else besides AI and cloudification?

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Top ten EDA/IP keywords in 2024: What else besides AI and cloudification?

Posted Date: 2024-02-13
Electronic Enthusiast Network reports (Text/Wu Zipeng) According to SEMI statistics, the global EDA market size is expected to reach US$14.526 billion in 2023. In recent years, the global semiconductor market has grown steadily, which has also led to a steady increase in sales in the EDA market. Currently, digital design and analog design tools rank in the top two in terms of proportion of the overall EDA market, with market shares reaching 65.0% and 17.1% respectively.

EDA and IP are both in the upstream of the industry, and together they are called the crown jewel of the chip industry. Not long ago, Synopsys officially announced that it had reached a final agreement with Ansys on the merger and acquisition. Under the terms of the agreement, the total acquisition value is approximately $35 billion. This gives a good start to the development of the EDA industry in 2024. So what else in the EDA/IP industry this year deserves attention? Let’s take a closer look.

Keyword 1: Mergers and Acquisitions Synopsys has officially announced that it plans to acquire Ansys for US$35 billion. Therefore, mergers and acquisitions in 2024 will still be one of the biggest highlights of the development of the EDA industry. The author mentioned in a recent sharing that Synopsys' number of mergers and acquisitions so far has exceeded 110, and this path will continue in the future. For the three companies Synopsys, Cadence and Siemens EDA, the next acquisition target is the fourth place in the next market besides domestic EDA companies, or it may be the fourth place in a certain segment.

Regarding mergers and acquisitions, domestic EDA mergers, acquisitions and integration in 2024 are also worthy of attention. Currently, semiconductor capital is extremely cautious. There are more than 80 EDA companies in the country, and most of them will encounter financing difficulties. Although it is not yet time for mergers and acquisitions in terms of volume, However, passive integration of domestic EDA may occur frequently in 2024.

Keyword 2: AI EDA has huge enabling value for AI chips. Without large-scale EDA tools, there would be no high-performance EDA chips today. Of course, AI technology will continue to feed back EDA in 2024.

In 2023, a chip verification survey report released by Wilson Research Group showed that the success rate of chip manufacturing companies’ first tape-out is declining, only 24%. AI technology can help human designers find errors beyond their experience, thereby improving the success rate of chip tape-out. launched by Synopsys is a typical technology for AI-empowered EDA. It has completed more than 200 commercial tape-outs, and this record will continue into 2024. At the same time, Cadence and Siemens EDA are also using AI technology to enhance their EDA tools, and intelligent EDA tools will gradually become mainstream.

Keyword 3: cloudification For enterprises, the most direct impetus for moving EDA to the cloud is that it is expected to solve the computing power problem. This is the view given by Silxin President Lin Kaipeng in previous interviews.

Indeed, as the complexity of chip design increases, more and more chip designs are moving towards the tens of billions of transistors. For EDA tools, computing power and storage have become bottlenecks. It can be seen from TSMC's financial report that 3nm and 5nm chips will contribute more market share in 2024, which will also push EDA companies to more firmly promote tools to the cloud to help design teams conduct chip design and verification more efficiently and safely. .

Keyword four: the whole process EDA has corresponding software for almost every step of the entire process in each subcategory. On the other hand, if you can have your tools cover the entire process of a segmented link, you can achieve the full process in this segmented link. If you can achieve the full process in all major links, you will have full-process tools for the entire IC.

Currently, only BGI Jiutian and Guanglun Electronics have achieved full-process coverage of domestic EDA, and they are still in the process of continuous optimization. For the other 80 domestic EDA companies, a major focus in 2024 is to expand point tools It is a full-process tool. If the full process has been implemented in a segmented field, such as Xinhuazhang's full-process coverage of digital verification, then more segmented fields need to be conquered. Judging from the development history of Synopsys, Cadence and Siemens EDA, the scale effect of EDA is very significant, and the entire process is the starting point for scale formation.

Keyword 5: Automotive chips According to IC Insights, global automotive chip shipments will reach 58.5 billion in 2022. Forecast data shows that global automotive chip shipments may reach more than 65.5 billion units in 2023, and will most likely exceed 70 billion units in 2024. Therefore, the automotive market is extremely important for the entire semiconductor market, and the same is true for EDA tools.

For automotive chip design, high-reliability design is an important and necessary development direction, providing core technical guarantee for the reliability and safety of automotive chips. For EDA companies, if they can provide car-grade models/PDKs/standard component libraries, can provide car-grade chip design and manufacturing tools, and can provide car-grade chip EDA reference design processes, they will win a huge market share in 2024. market opportunities.

Keyword 6: RISC-V Whether it is for EDA tools or IP, RISC-V is a segmentation direction that must be paid attention to. In 2023, RISC-V will further improve its image. In the past, stereotypes such as "low-end", "small chips" and "limited to MCU" lingered around RISC-V. In 2023, these fallacies will be broken. .

In 2024, RISC-V will continue its high-end process, which is inseparable from the high-end RISC-V IP core and supporting tools. In 2023, Synopsys has officially announced that it will enter the RISC-V architecture, not only with IP but also with related tools. This will be an obvious name, and other EDA tool companies must quickly follow up. The EDA tools used to create RISC-V architecture chips in 2024 will be a highlight.

Keyword seven: 2nm In 2023, TSMC stated that N2 technology research and development is advancing in an orderly manner, and trial production will be launched in 2024, with mass production in 2025. There is no doubt that 2024 will be a critical year for the development of 2nm.

A more advanced process means a more complex chip, which requires EDA tools with more powerful performance and scale. Therefore, companies like Synopsys will be more determined to move EDA to the cloud and use AI technology to improve their tools. Of course, there are also opportunities for domestic EDA companies. The advantage of point tools is that they can quickly follow advanced processes. This is also an opportunity for the development of domestic EDA.

Keyword 8: Interface IP According to IP nest’s forecast data, interface IP is expected to surpass processor IP and become the largest semiconductor IP category in 2025. Therefore, interface IP will have huge development opportunities in 2024.

The main opportunities for interface IP will be in PCIe, memory controller (DDR) and Ethernet and D2D. Among them, PCIe will mainly benefit from the huge demand in the high-performance computing market, as will Ethernet and DDR. D2D IP is mainly because Chiplet technology has been widely recognized, and chiplet dies need to be interconnected through D2D interfaces.

For interface IP, standards will be further unified in 2024, and the UCIe standards alliance will continue to grow.

Keyword 9: Chiplet Whether from the perspective of EDA tools or IP, Chiplets will be a highlight in 2024. For EDA, there will be great market demand for how to help realize a chip architecture more suitable for chiplets and create higher-performance functional IP and interface IP. For IP, not only interface IP will have huge opportunities, but changes in IP service forms may bring about market changes.

The implementation of Chiplet opens up a new mode of IP reuse, that is, silicon-level IP reuse, also known as IP chipization. This new approach requires IP suppliers to re-cultivate their own IP business, including processor IP, memory IP and interface IP.

Keyword ten: localization Judging from the current international situation, it is difficult to change the external market environment in the short term. Localization will still be the main theme of the development of the domestic semiconductor industry. This is also true for EDA and IP, and the situation is more severe.

The position of EDA and IP is the most upstream position in the semiconductor industry chain. There are only equipment and materials in the same position, which is an extremely easy to get stuck. Therefore, it is very necessary to develop domestic EDA and strengthen the domestic IP industry. As mentioned above, building domestic EDA requires full-process tools, and point tools can only be relied on. But how to reduce complexity to simplicity is a critical and difficult issue. Many people hope for policy guidance, but how to guide the policy itself is a problem, so 2024 will still be a state of fumbling forward.

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